cpuidle: Add support for Always Running APIC timer, CPUID_0x6_EAX_Bit2.
This bit means the APIC timer continues to run even when CPU is
in deep C-states.
The advantage is that we can use LAPIC timer on these CPUs
always, and there is no need for "slow to read and program"
external timers (HPET/PIT) and the timer broadcast logic
and related code in C-state entry and exit.
Refer to the latest Intel SDM Vol 2A
(http://www.intel.com/products/processor/manuals/index.htm)
Signed-off-by: Wei Gang <gang.wei@intel.com>